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A radio frequency (RF) reflectometry technique is presented to measure device capacitances using a probe station. This technique is used to characterize micro-electromechanical system (MEMS) variable capacitor devices that can be connected to create pull-up and pull-down networks used in digital gates for reversible computing. Adiabatic reversible computing is a promising approach to energy-efficient computing that can dramatically reduce heat dissipation by switching circuits at speeds below their RC time constants, introducing a trade-off between energy and speed. The variable capacitors in this study will be measured using single port RF reflectometry achieved with a custom-made RF probe. The RF probe consists of a micromanipulator with an on-board matching network and is calibrated by measuring a capacitive bank that shows a clearly visible frequency shift with the increase in capacitance. The RF probe worked well when measuring static capacitors with no parasitic resistance; however, the frequency shift is masked when measuring the MEMS variable capacitors due to their high in-series parasitic resistance (around 80 kΩ). Therefore, RF reflectometry has the potential to measure MEMS variable capacitors in the range of 0–30 fF when not masked by a high in-series parasitic resistance, creating a fast and versatile method for characterizing variable capacitors that can be used in energy-efficient computing. 

Abstract Sensitive dispersive readouts of single-electron devices (“gate reflectometry”) rely on one-port radio-frequency (RF) reflectometry to read out the state of the sensor. A standard practice in reflectometry measurements is to design an impedance transformer to match the impedance of the load to the characteristic impedance of the transmission line and thus obtain the best sensitivity and signal-to-noise ratio. This is particularly important for measuring large impedances, typical for dispersive readouts of single-electron devices because even a small mismatch will cause a strong signal degradation. When performing RF measurements, a calibration and error correction of the measurement apparatus must be performed in order to remove errors caused by unavoidable non-idealities of the measurement system. Lack of calibration makes optimizing a matching network difficult and ambiguous, and it also prevents a direct quantitative comparison between measurements taken of different devices or on different systems. We propose and demonstrate a simple straightforward method to design and optimize a pi matching network for readouts of devices with large impedance, $$Z \ge 1\hbox {M}\Omega$$ Z ≥ 1 M Ω . It is based on a single low temperature calibrated measurement of an unadjusted network composed of a single L-section followed by a simple calculation to determine a value of the “balancing” capacitor needed to achieve matching conditions for a pi network. We demonstrate that the proposed calibration/error correction technique can be directly applied at low temperature using inexpensive calibration standards. Using proper modeling of the matching networks adjusted for low temperature operation the measurement system can be easily optimized to achieve the best conditions for energy transfer and targeted bandwidth, and can be used for quantitative measurements of the device impedance. In this work we use gate reflectometry to readout the signal generated by arrays of parallel-connected Al-AlOx single-electron boxes. Such arrays can be used as a fast nanoscale voltage sensor for scanning probe applications. We perform measurements of sensitivity and bandwidth for various settings of the matching network connected to arrays and obtain strong agreement with the simulations. 

Abstract The proposal of fault-tolerant quantum computations, which promise to dramatically improve the operation of quantum computers and to accelerate the development of the compact hardware for them, is based on topological quantum field theories, which rely on the existence in Nature of physical systems described by a Lagrangian containing a non-Abelian (NA) topological term. These are solid-state systems having two-dimensional electrons, which are coupled to magnetic-flux-quanta vortexes, forming complex particles, known as anyons. Topological quantum computing (TQC) operations thus represent a physical realization of the mathematical operations involving NA representations of a braid group B n , generated by a set of n localized anyons, which can be braided and fused using a “tweezer” and controlled by a detector. For most of the potential TQC material systems known so far, which are 2D-electron–gas semiconductor structure at high magnetic field and a variety of hybrid superconductor/topological-material heterostructures, the realization of anyon localization versus tweezing and detecting meets serious obstacles, chief among which are the necessity of using current control, i.e., mobile particles, of the TQC operations and high density electron puddles (containing thousands of electrons) to generate a single vortex. Here we demonstrate a novel system, in which these obstacles can be overcome, and in which vortexes are generated by a single electron. This is a ~ 150 nm size many electron InP/GaInP 2 self-organized quantum dot, in which molecules, consisting of a few localized anyons, are naturally formed and exist at zero external magnetic field. We used high-spatial-resolution scanning magneto-photoluminescence spectroscopy measurements of a set of the dots having five and six electrons, together with many-body quantum mechanical calculations to demonstrate spontaneous formation of the anyon magneto-electron particles ( e ν ) having fractional charge ν  =  n / k, where n  = 1–4 and k  = 3–15 are the number of electrons and vortexes, respectively, arranged in molecular structures having a built-in (internal) magnetic field of 6–12 T. Using direct imaging of the molecular configurations we observed fusion and braiding of e ν - anyons under photo-excitation and revealed the possibility of using charge sensing for their control. Our investigations show that InP/GaInP 2 anyon-molecule QDs, which have intrinsic transformations of localized e ν - anyons compatible with TQC operations and capable of being probed by charge sensing, are very promising for the realization of TQC. 

Single-electron tunneling transistors (SETs) and boxes (SEBs) exploit the phenomenon of Coulomb blockade to achieve unprecedented charge sensitivities. Single-electron boxes, however, despite their simplicity compared to SETs, have rarely been used for practical applications. The main reason for that is that unlike a SET where the gate voltage controls conductance between the source and the drain, an SEB is a two terminal device that requires either an integrated SET amplifier or high-frequency probing of its complex admittance by means of radio frequency reflectometry (RFR). The signal to noise ratio (SNR) for a SEB is small, due to its much lower admittance compared to a SET and thus matching networks are required for efficient coupling ofSEBs to an RFR setup. To boost the signal strength by a factor of N (due to a random offset charge) SEBs can be connected in parallel to form arrays sharing common gates and sources. The smaller the size of the SEB, the larger the charging energy of a SEB enabling higher operation temperature, and using devices with a small footprint (<0.01 µm2), a large number of devices (>1000) can be assembled into an array occupying just a few square microns. We show that it is possible to design SEB arrays that may compete with an SET in terms of sensitivity. In this, we tested SETs using RF reflectometry in a configuration with no DC through path (“DC-decoupled SET” or DCD SET) along with SEBs connected to the same matching network. The experiment shows that the lack of a path for a DC current makes SEBs and DCD SETs highly electrostatic discharge (ESD) tolerant, a very desirable feature for applications. We perform a detailed analysis of experimental data on SEB arrays of various sizes and compare it with simulations to devise several ways for practical applications of SEB arrays and DCD SETs. 

Single electron transistors (SET) featuring metal (Ni) electrodes and silicon nitride dielectric barriers prepared by atomic layer deposition are fabricated and tested. Electrical characterization of the devices reveals electrostatic energy parameters consistent with the parameters of the designed tunnel junctions. In addition, an analysis of temperature dependence of conductance confirms the formation of metal-insulator-metal (MIM) junctions with negligible in-series contribution of any surface native metal oxide. However, the fabricated devices exhibit a very high level of electrical noise, far exceeding the commonly observed shot noise. Experimental investigation reveals the random telegraph signal (RTS) nature of the observed excess noise. The RTS noise in electronic devices is commonly associated with charging of external traps that are electrostatically coupled to the SET island. In the devices under study, however, the defects that result in the observed RTS noise are demonstrated to reside within the tunnel junctions. Our results also indicate the critical importance of interface states and surface preparation for achieving good performance of the SETs fabricated using ALD to form the tunnel barrier.